Dual-gate devices are well-known, however conventional gate fabrication techniques limit the degree that the devices can be scaled (in terms of gate length, gate-gate spacing, and source-drain spacing). The dimension of the gate head is on the order of 0.5 μm or larger in a conventional T-gate structure that is often used at higher frequencies. Thus, in the prior art, a 1.0 μm spacing between the device's source and drain allows only one gate for GaN HEMT devices.
Using a DC gate in a dual gate device allows for the reduction or elimination of the Drain to RF Gate capacitance. Ordinarily the capacitance between the drain and gate limits the bandwidth of the device. Adding a DC gate between the RF gate and the drain breaks a feedback path between the input RF Gate and the Drain of the device.
But limitations on device scalability, in addition to limitations imposed by the baseline transistor technology, then have put a limitations on the operating frequency of the prior art dual gate devices. For this reason, prior art dual-gate devices are seldom used at frequencies above X-band (10 GHz). The device disclosed herein will allow dual-gate devices to be utilized in MMICs at frequencies up to the W-band (70-110 GHz) and perhaps higher, and will enable better performance (in terms of gain, noise figure, and power added efficiency) than prior art devices.
Dual gate devices are potentially beneficial for any RF amplifier, but directly benefit high-linearity LNAs and traveling wave amplifiers, both of which derive very clear performance benefits from using dual-gate devices if they can be made to work at suitably high frequencies
Dual-gate devices are well-known, however conventional gate fabrication techniques limit the degree that the devices can be scaled (in terms of gate length, gate-gate spacing, and source-drain spacing). Most fabrication processes that have been demonstrated in the literature simply use standard fabrication processes for the RF and DC gates within a dual gate structure. This will work for lower frequencies, but when aggressive scaling is needed (for higher frequencies) parasitic coupling between the gates can be a serious problem that will limit performance of the device.
A dual gate device is a transistor with two gate structures placed between a pair of source and drain contacts. This dual gate device operates like a “cascode” (a common-source followed by a common-gate transistor), except within a single device rather than two separate devices. See, Moon, J. S. et al., “70% Power-Added-Efficiency Dual-Gate, Cascode GaN HEMTs Without Harmonic Tuning”, IEEE Electron Device Letters, Vol. 37, No. 3, March 2016, the disclosure of which is hereby incorporated herein by reference. The RF gate is placed closer to the source contact, and functions in the same way that a gate does within a standard common-source amplifier cell in that it receives the RF input signal. The DC gate is placed closer to the drain, and, in use, receives a constant DC voltage to enable operation as a common-gate device. This configuration is advantageous in that it increases output resistance and greatly reduces the Miller effect (amplification of the feedback capacitance caused by transistor voltage gain).
Traditionally dual-gate devices within GaN are designed using field-plate gates, and are intended to operate at microwave frequencies below 10 GHz. Achieving high-performance at mm-wave frequencies within a dual-gate device will require fabricating highly-scaled RF T-gates and it will require an unprecedented degree of lateral scaling between the RF and DC gates, both of which present significant fabrication challenges. In particular, it will be difficult to form both the RF and DC gates at the same time because resist undercut needed by standard bi-layer or tri-layer e-beam process will make it impractical to resolve the features in proximity that is closer than 1 to 2 μm.
Preferably, the intrinsic capacitance between the RF gate and the channel of the HEMT device is much larger than the parasitic capacitance between the RF gate and the DC gate.